Ferenc Mernyei*, Matthijs Pardoen, Wolfgang Höss, Franz Darrer
Austria Mikro Systeme International AG,
Schloss Premstätten, A-8141 Unterpremstätten, Austria
* Reitter Ferenc u 39-49, H-1135 Budapest, Hungary
Indexing terms: VCO, integrated inductor, phase noise
This paper describes a 1.7GHz Voltage Controlled Oscillator (VCO) fully integrated in a low-cost 0.8um BiCMOS technology. It consists ofspirals a differential cross coupled Colpitts oscillator with on-chip spirals and level control circuitry. The measured phase noise of the VCO was -135dBc at 5 MHz from the carrier .
At all In low phase noise Radio Frequency (RF) VCOs for wireless applications the resonators are critical parts. Off-chip strip-line Printed Circuit Board (PCB) resonators are difficult to design. Package parasitics and bond wires are part of the resonator circuitry. Consequently their accurate modeling is a must . Furthermore, the package causes unwanted couplings between the resonator pins –where large RF currents can be present– and the other parts of the circuit. On-chip resonators are good candidates to avoid package associated problems. Integrated resonators that contain simple integrated spirals suffer from a low quality factor (Q) due to ohmic and substrate losses. Their typical Q is around 4-5 at 2GHz on high ohmic silicon substrates and limits the oscillator’s phase noise performance. The design introduced here shows ways to improve performance
THE VCO WITH LEVEL CONTROLLER
The blocks of the VCO
The VCO shown in figure 1 contains three main blocks; the Level Controller, a voltage to current (V/I) converter and the VCO-CORE. The cross-coupled Colpitts oscillator core details are shown in figure 2.differential Colpitts oscillator are shown in Figure 2 The resonant frequency is determined by the LC-tank (spirals), the varactor BJTs and the CC1, CC2 coupling capacitors. The signal amplitude at the resonator is defined by the tail current of the core (controlled by the level controller part) and by the CC1(2)/CG1(2) capacitance ratio.
The VCO-core schematic
The level controller keeps the RF voltage levels at the VCO output (the base of the core BJTs Q1 and Q2) constant. It converts the differential RF signal into a rectified current (IRECT) which is deducted from a reference current (IREF), resulting in the difference current (IDIFF), which charges the buffer capacitance. IRECT is proportional to the voltage levels on the base nodes of the core BJTs. The desired level can be adjusted by IREF. If the detected RF voltage is small, the rectified current is small as well. In this case the voltage on the buffer capacitance increases as long as the detected RF signal becomes large enough to reduce the difference current to zero.DC voltage on the capacitor unchanged. The DC voltage on the buffer capacitor defines the tail current of the core by the V/I converter circuitry. The level controller provides a very fast and stable startup of the oscillator because the tail current of the core starts at its maximum value.
An additional benefit of the level controller is that it will increase the resonator power level when its quality factor decreases. Consequently, it will keep the phase noise performance less dependent on technology tolerances and tuning conditions
Tuning the VCO is provided by reverse biased BJT base-emitter junctions.
Since high signal swings will forward bias these junctions and cause phase
noise degradation. The signal levels should be limited. allowed signal
levels. On the other hand we should avoid the reduction of the collector
voltage below the base voltage at the core BJTs, which causes phase noise
degradation as well. For the best phase noise performance the signal amplitude
should be as large as possible on the resonator. Therefore we used the
highest possible CG/CC ratio to maximize the signal levels on the collectors
of the core BJTs (Q1&Q2). The maximum ratio is determined by by the
necessary VCO loop-gain: when CG becomes too large it results in a to low
RF voltage level on the base nodes and the oscillation conditions will
not be fulfilled. We limited the control voltage of the varactor BJTs to
VCC-0.5V to allow 0.7Vp signals on the resonator.
SPIRALS WITH REDUCED LOSSES
There are solutions to reduce the spiral loses:  reports vertically coupled spirals with Q=4 limited by the wide gaps between the long metal lines,  reports about optimized spiral geometry to improve the characteristics of the spirals. We followed the optimization guidelines using a momentum method based simulator . Optimizing the spirals means to increase the line widths in order to reduce the ohmic losses as long as the parasitic substrate capacitance defines the maximum of the Q(f) curve to the desired frequency.
To achieve further improvements in the quality factor of the spirals we reduced the substrate losses as well. In the highly conductive top p+ layer of the Si substrate there are eddy currents being responsible for most of the substrate related losses . To reduce them we placed n-well stripes perpendicular to the possible eddy current flow into the top p+ layer of the substrate. The structure forms p-n junctions against the eddy currents which will block their flow. The method results in the increased quality factor (see Figure 3-4. and Table I.)
Detailed equivalent circuit for the spirals
Quality factor vs. frequency at the measured inductors (see TABLE I. for spiral details)
The VCO was integrated as a separate testchip (see Figure 5.). We used the built-in phase noise measurement feature of the Rohde-Schwarz FSEA30 spectrum analyzer, which tests the VCO in free running mode. In figure 6 the measured phase noise performance is shown at different supply voltages. Table II. gives a summary of the VCO parameters.
The chip-photograph of the test VCO
|Frequency range||1.7-1.9 GHz|
|Phase email@example.comMhz||<-135 dBc|
|Tuning Gain||50 MHz/V|
|Control voltage||Vcc-0.5V - Vcc-2.5V|
|Supply Current||< 10 mA|
|Supply Voltage||2.7-4.5 V|
Summary of the VCO parameters
Phase noise performance of the VCO
A fully integrated VCO for RF wireless applications has been described. The employed circuitry provides improved start up and level stability performance due to its level controller part. This allows to connect the connection of the VCO’s output directly to the output stages of a transceiver or ECL-type divider inputs. without any further signal conditioning. By employing substrate loss reduction “stripes” under the integrated spirals, The phase noise performance has been improved. The VCO, integrated in a low-cost fT=12GHz BiCMOS process shows comparable performance compared to previously reported VCOs integrated in fT>30GHz processes MHz from the carrier.
 F. Mernyei: „Measurement and Field Simulation Based Characterization of Plastic IC Packages,” 6th Topical Meeting on Electrical Performance of Electronic Packaging, 1997., Proceedings of the IEEE pp181-184
 M. Zannoth, B. Kolb, J. Fenk, R. Weigel: „A Fully Integrated VCO at 2GHz,” IEEE International Solid State Conference 1988, pp224-225
 J. Craninckx, M. Steyaert, H. Miyakawa: „A Fully Integrated Spiral-LC CMOS VCO Set with Prescaler for GSM and DCS-1800 Systems,” IEEE Custom Integrated Circuits Conference 1997, pp403-406
 A. M. Niknejad,. R. G. Meyer: „Analysis and optimization of monolithic inductors and transformers for RF ICs,” Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997 , pp375-378
 J. Craninckx, M. Steyaert, H. Miyakawa: „A 1.8GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE Journal of Solid-State Circuits, vol. 32. no.4., April 1997,